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ver - Structual Verilog Compiler

/Main/Other/i386/Development/Building/

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A Structural Verilog compiler. A stand alone simulator (vsim) is included for testing of logic designs. A cycle simulation compiler (cyco) is included which compiles netlists into fast C code. The event simulator also handles 0, 1, x, z logic levels.

Verilog, structural, HDL, digital, logic, simulator, testing, cycle simulation

Homepage:	http://buster.nac.net/~bybell/ver.html
Package version:	0.98
Architecture:	i386
Distribution:	Other
Filename:	ver-0.98-1.i386.rpm

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Browse inside ver-0.98-1.i386.rpm:

pkg://ver-0.98-1.i386.rpm:128466/  downloads

946 B  2008-05-19HEADER  view  450+ mirrors
[DIR]usr/  1000+ twin directories

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Download ver-0.98-1.i386.rpm:

1998-08-05  ftp://sunsite.mff.cuni.cz/MIRRORS/archive.download.redhat.com/redhat/linux/5.1/en/powertools/i386/ver-0.98-1.i386.rpm
1998-08-05  ftp://ftp.gmd.de/archive.download.redhat.com/redhat/linux/5.1/en/powertools/i386/ver-0.98-1.i386.rpm
1998-08-05  ftp://ftp.uni-koeln.de/mirrors/redhat.com/redhat/linux/5.1/en/powertools/i386/ver-0.98-1.i386.rpm
1998-08-05  ftp://ftp.rhrz.uni-bonn.de/pub-koeln/mirrors/redhat.com/redhat/linux/5.1/en/powertools/i386/ver-0.98-1.i386.rpm
1998-08-05  ftp://ftp.li.kernel.org/pub/.3/archive.download.redhat.com/redhat/linux/5.1/en/powertools/i386/ver-0.98-1.i386.rpm